Core engineering and protocols for Spectre & Transient Execution Defenses.
Modern out-of-order processors aggressively predict branch outcomes and speculatively execute instructions before condition evaluation completes. In attacks like Spectre-V1, an adversary trains the branch predictor to speculatively read out-of-bounds memory, loading secret key bytes into cache before the CPU rolls back the speculative execution.
MLKEMSec integrates Speculative Load Hardening techniques into its assembly kernels. Array indices and memory addresses are blended with condition masks, ensuring that even if speculative execution occurs, the effective memory address is constrained to safe, non-sensitive buffers, thwarting speculative exfiltration.